Experimental Research of SEU and SEL in High Density SRAMs With Sub-micron Feature Sizes

The aggressive downscaling of CMOS technology has resulted in that radiation induced single event upset (SEU) reliability is getting worse and worse. Using the HI-13 tandem accelerator in China Institute of Atomic Energy, heavy ion SEU and single event latch-up (SEL) sensitivities for a variety of non-hardened high density static random access memories (SRAMs) with sub-micron feature sizes were reported. The results were compared with previously measured sensitivities for similar devices with larger features. The problems associated with SEU become more sever as device dimensions decrease. Multiple-bit upsets (MBU) for the HM62V16100LT15 in 0.13 μm CMOS technology caused by a single ion were analyzed. The frequency and the distribution of MBU were given. MBU makes challenge for EDAC adopted by the system of satellites.