Design on Front-end Readout ASIC with Variable Gain and Wide Dynamic Range for 3D Si PIN Array Thermal Neutron Detector

The front-end readout ASIC based on Si CMOS technology is primarily designed according to the output signal characteristics of the 3D Si PIN array thermal neutron detector. The key circuit modules of the designed readout ASIC include the charge sensitive amplifier (CSA), the analog switch design, an automatic gain control module (AGC) with threelevel charge sensitivity automatic switching, the correlation dual sampling (CDS) and reference current source circuit. The simulation results show that the input dynamic range of the frontend circuit is 10 fC8.0 pC. The three gain coefficients of the designed ASIC according to the thermal neutron detector output signal characteristics are set as 1.9 V/pC, 0.39 V/pC and 94 mV/pC, respectively. The integral nonlinearity of the designed ASIC is less than 1%. The single channel static power consumption is about 5.36 mW. The equivalent noise charge at zero input detector capacitance is 241.6e-. The counting rate can arrive to the level of 1 MHz.