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基于3D Si PIN阵列热中子探测器的变增益宽动态前端读出电子学设计

Design on Front-end Readout ASIC with Variable Gain and Wide Dynamic Range for 3D Si PIN Array Thermal Neutron Detector

    摘要
  • 摘要: 基于Si CMOS技术的前端读出ASIC主要是根据3D Si PIN阵列热中子探测器的输出信号特性设计的。所设计的读出ASIC的主要电路模块包括电荷灵敏放大器（CSA）、模拟开关设计、具有三级电荷灵敏自动转换的自动增益控制模块（AGC）、相关双采样（CDS）和基准电流源电路。仿真结果表明，前端电路的输入动态范围为10 fC~8.0 pC。根据热中子探测器输出信号特性设计的ASIC的3个增益系数分别为1.9 V/pC、0.39 V/pC和94 mV/pC。所设计的ASIC的积分非线性小于 1%。单通道静态功耗约为 5.36 mW。零输入探测器电容时的等效噪声电荷为241.6e-。计数率可达1 MHz 。

     

    Abstract: The front-end readout ASIC based on Si CMOS technology is primarily designed according to the output signal characteristics of the 3D Si PIN array thermal neutron detector. The key circuit modules of the designed readout ASIC include the charge sensitive amplifier (CSA), the analog switch design, an automatic gain control module (AGC) with threelevel charge sensitivity automatic switching, the correlation dual sampling (CDS) and reference current source circuit. The simulation results show that the input dynamic range of the frontend circuit is 10 fC8.0 pC. The three gain coefficients of the designed ASIC according to the thermal neutron detector output signal characteristics are set as 1.9 V/pC, 0.39 V/pC and 94 mV/pC, respectively. The integral nonlinearity of the designed ASIC is less than 1%. The single channel static power consumption is about 5.36 mW. The equivalent noise charge at zero input detector capacitance is 241.6e-. The counting rate can arrive to the level of 1 MHz.

     

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