Abstract: The complexity of radiation effects in system-level circuits imposes dual requirements on modeling approaches—high accuracy and high computational efficiency. As a core component of system-level circuits, CMOS (complementary metal oxide semiconductor) transceivers require precise modeling and simulation of total ionizing dose (TID) effects. This paper proposes a behavioral-level simulation method for TID effects in CMOS transceivers. Taking the Hi-1573 transceiver as an example, a normal model was constructed based on its datasheet. The input/output buffer information specification (IBIS) model was employed to characterize the buffer properties of the Hi-1573, while the functional blocks were modeled using VHDL-AMS. The simulation results of the normal model are consistent with the timing results in the device manual, which proves the rationality of the normal model. To simulate TID effects, the sensitive electrical parameters in the IBIS model were adjusted according to radiation-induced degradation, forming the IBIS TID effects model. The ⁶⁰Co gamma-ray irradiation experiment of Hi-1573 was carried out at the Northwest Institute of Nuclear Technology (with a dose rate of 50 rad(Si)/s). Five TID levels (0, 50, 80, 100, and 150 krad) were tested. The experiment adopted the displacement test. During the test, the high-level values of the input differential signals BUSA and BUSAN were reduced at a step size of 0.01 V until the output signal RXA at the output port disappeared. The sum of the high-level values of the input differential signals was recorded and called the minimum amplitude value. In addition, the rise time, fall time, and positive duty cycle of the RXA output signal were recorded for each dose level. Experimental results show that as TID increases, the minimum input amplitude rises, the output signal rises and fall time increases, and the positive duty cycle decreases. These changes are mainly caused by threshold voltage shift in the input buffer and increased MOSFET on-resistance. The IBIS TID effects model can simulate the increase of the minimum amplitude value of the input signal and the increase of the rise and fall time of the output signal, but it cannot change the positive duty cycle of the output signal. In order to model the reduction of the positive duty cycle of the device output signal, a TID effect module was added after the functional area of Hi-1573 to correct the positive duty cycle of Hi-1573 and carried out in combination with the IBIS TID effects model. The degradation trend of the simulation results is consistent with that of the experimental results, which prove the feasibility of the behavior-level simulation method for the TID effects of CMOS transceivers.